Notes and Cautions:

The following emulation modules have at least basic debugger functionality implemented

• md
• nes
• pce
• pcfx
• psx
• ss
• vb
• wswan

Save States, Power/Reset: Utilizing save states and power toggling/resetting in step mode may lead to significant malfunctions or glitches in the following emulation modules:

• md
• nes
• psx
• ss
• vb
• wswan

Video Updates: The last valid(non-skipped) video frame is drawn while in step mode. Older versions of Mednafen would attempt to draw the current, incomplete frame as emulation progressed, but this was rather buggy because the emulation code was not designed with it in mind.

Read Breakpoints: Opcode, operand, and prefix(in WonderSwan case) fetches will trigger read breakpoints in the NES, PC Engine, and WonderSwan debuggers.

PC Breakpoints: PC breakpoints are evaluated only for the state of PC at the start of the instruction(or start of prefixes for an instruction in the case of V30MZ); IE, a PC breakpoint set on the address of an operand byte(6502, HuC6280, V30MZ) or the second 16-bits of a 32-bit instruction(V810) will not be triggered when the instruction is executed.

Branch History: When the CPU debugger view is not active, the branch history will only be updated reliably when at least one breakpoint is active/installed.

Quick Key Reference

Memory Poking

High-level poking will attempt to write the desired value to the underlying storage(ROM or RAM). Normal(low-level) poking will go through the same write handlers as the virtual CPU operates through. Note that high-level poking is not implemented for all systems.

The format for the string to enter when poking memory(highlevel or lowlevel), is "[*]address value [size]", with values in brackets being optional. Prefixing the address with a "*" will cause the address to be treated as a physical address, which is currently only meaningful on systems that have paging registers internal to the CPU, such as the PC Engine/TurboGrafx 16.

Read and Write Breakpoints

You may enter either a single address to break on, or a range. Read and write breakpoints operate on logical addresses, unless you prefix the address with a "*", or the first address in the case of a range.
Exception: WonderSwan read/write breakpoints only operate on 20-bit physical addresses for the time being. Furthermore, only the lower 8 bits of WonderSwan I/O breakpoints are considered.

Multiple entries should be separated by one space character. Examples:

   2000-2007 4014 4015
   0000 1800 2300-23ff
   *1fe000
  

   *ff:0000-ff:03ff
  

WonderSwan notes:
Segment(16-bit):offset(16-bit) form can also be used with the WonderSwan debugger, but you still need to prefix it with a "*", even though logical address breakpoints aren't supported with WonderSwan emulation currently. Also, the segment:offset pair is internally translated to a 20-bit address, and because segments overlap, you can get breakpoints to occur on writes with other segments than the one you specified.

Aux Read and Write Breakpoints

Aux r/w breakpoints operate on secondary storage reads and writes.