Save States, Power/Reset: Utilizing save states and power toggling/resetting in step mode may lead to significant malfunctions or glitches in the following emulation modules:
Video Updates: The last valid(non-skipped) video frame is drawn while in step mode. Older versions of Mednafen would attempt to draw the current, incomplete frame as emulation progressed, but this was rather buggy because the emulation code was not designed with it in mind.
Read Breakpoints: Opcode, operand, and prefix(in WonderSwan case) fetches will trigger read breakpoints in the NES, PC Engine, and WonderSwan debuggers.
PC Breakpoints: PC breakpoints are evaluated only for the state of PC at the start of the instruction(or start of prefixes for an instruction in the case of V30MZ); IE, a PC breakpoint set on the address of an operand byte(6502, HuC6280, V30MZ) or the second 16-bits of a 32-bit instruction(V810) will not be triggered when the instruction is executed.
Branch History: When the CPU debugger view is not active, the branch history will only be updated reliably when at least one breakpoint is active/installed.
|ALT+D||Master debugger view toggle.|
|ALT+1||CPU debugger view.|
|-/+||Decrease/Increase debugger background opacity.|
|T||Toggle disassembly mode. Currently only used for selecting between Intel and AT&T syntaxes for the WonderSwan debugger.|
|Return||Edit disassembly address, or edit selected register.|
|SHIFT+Return||Edit watch address.|
|Space||Toggle PC breakpoint on selected disassembly address.|
|SHIFT+R||Edit read breakpoints.|
|SHIFT+W||Edit write breakpoints.|
|CTRL+SHIFT+R||Edit I/O read breakpoints(for PC-FX and WonderSwan; I/O instructions on VB go through regular read/write breakpoints).|
|CTRL+SHIFT+W||Edit I/O write breakpoints(for PC-FX and WonderSwan; I/O instructions on VB go through regular read/write breakpoints).|
|CTRL+R||Edit Aux read breakpoints.|
|CTRL+W||Edit Aux write breakpoints.|
|SHIFT+O||Edit opcode breakpoints(PC Engine only for now).|
|Tab||Switch cursor focus between disassembly and registers.|
|Up, Left, Right, Down, PageUp, PageDown||Select disassembly address or select register.|
|SHIFT + (Up, Left, Right, Down, PageUp, PageDown)||Select watch address.|
|M||Toggle watch window between logical and physical(if available) addressing.|
|P||Poke a value to memory.|
|SHIFT + P||High-level poke a value to the underlying ROM or RAM.|
|<||Decrease palette bank number.|
|>||Increase palette bank number.|
|Up, Down||Scroll up or down.|
|Left, Right||Select graphics layer.|
|-/+||Select line number(not necessarily visible line number...) to decode graphics on.|
|D||Dump memory from the selected address space to a file.
Two specification string are recognized:
andstart_address end_address(inclusive) filename Example: 0 1fff dump.bin
start_address +count filename Example: 0 +2000 dump.bin
|L||Load memory from file into selected address space. Uses the same format of specification string as the "dump memory" function.|
|R||8-bit relative byte-string search.|
|<, >||Select address space.|
|Up, Down, Left, Right||Move the cursor around and possibly scroll.|
|PageUp, PageDown||Scroll up, or scroll down, one page(256 bytes).|
|Home||Move cursor to address 0.|
|End||Move cursor to the end of the address space minus 16.|
|Insert||Enter edit mode.|
|Log Viewer(PC Engine CD and PC-FX only for now)|
|T||Toggle logging on/off.|
High-level poking will attempt to write the desired value to the underlying storage(ROM or RAM). Normal(low-level) poking will go through the same write handlers as the virtual CPU operates through. Note that high-level poking is not implemented for all systems.
The format for the string to enter when poking memory(highlevel or lowlevel), is "[*]address value [size]", with values in brackets being optional. Prefixing the address with a "*" will cause the address to be treated as a physical address, which is currently only meaningful on systems that have paging registers internal to the CPU, such as the PC Engine/TurboGrafx 16.
You may enter either a single address to break on, or a range. Read and write breakpoints operate on logical addresses, unless you prefix the address with a "*", or the first
address in the case of a range.
Exception: WonderSwan read/write breakpoints only operate on 20-bit physical addresses for the time being. Furthermore, only the lower 8 bits of WonderSwan I/O breakpoints are considered.
Multiple entries should be separated by one space character. Examples:
2000-2007 4014 4015 0000 1800 2300-23ff *1fe000You may also use "segment:offset" form with absolute addresses with PC Engine emulation, such as:
*ff:0000-ff:03ff...which will cause a break on any writes to the VDC, including the ST0, ST1, ST2 instructions. Note that the offset is internally ANDed with 0x1FFF, so 0x2000 and 0x0000 would be equivalent offsets.
Segment(16-bit):offset(16-bit) form can also be used with the WonderSwan debugger, but you still need to prefix it with a "*", even though logical address breakpoints aren't supported with WonderSwan emulation currently. Also, the segment:offset pair is internally translated to a 20-bit address, and because segments overlap, you can get breakpoints to occur on writes with other segments than the one you specified.
Aux r/w breakpoints operate on secondary storage reads and writes.
|10000-17FFF||VDC-B VRAM(SuperGrafx only)|
|20000-2001F||VDC Indexed Register|
|30000-3001F||VDC-B Indexed Register(SuperGrafx only)|
|00000-3FFFF||KING KRAM Page 0|
|40000-7FFFF||KING KRAM Page 1|
|A0000-A001F||VDC-A Indexed Register|
|B0000-B001F||VDC-B Indexed Register|